Bittware AV-870p | AMD Xilinx Versal 7nm SoC | PCIe Gen5
The Bittware AV-870p FPGA accelerator board features the Versal Premium 7nm Architecture, combining high bandwidth and compute density on an adaptable platform.
Brought to market in partnership with LDA Technologies, the Bittware AV-870p is a PCIe Gen5 accelerator card designed to deliver extreme performance for data center and edge compute workloads.
AMD's Next-Gen Programmable Hardware: The AMD Xilinx Versal Adaptive SoCs integrate networked, power-optimized cores on an adaptable platform for the most challenging compute and networking applications.
7nm Architecture: The latest generation 7nm architecture combines adaptable compute engines with a breadth of hardened memory and interfacing technologies for superior performance/watt over competing 10nm FPGAs.
PCIe Gen5 Support: PCIe Gen5 supports data transfer speeds 2x higher than PCIe Gen4, providing greater performance capabilities to developers of PC interconnect, graphics adapters, and chip-level communications.
Flexible Expansion IO
The AV-870p offers a range of I/O flexibility to meet your application needs:
- Get to Market Faster With IP & Solutions from BittWare Partners
- nxFramework FPGA Development Framework from Enyx
- oneAPI Software Tool Flow Frame for FPGAs by Intel
- Query Processing Unit IP Core from Eideticom for Computational Storage Acceleration
- RDMA IP Core for RoCE v2 from Grovf
Bittware AV-870p Data Sheet
Adaptive SoC
- Versal Premium
- VP1502/ VP1552
- Core speed grade - 2
On-Board flash
- Flash memory for booting FPGA
External memory
- 2x 4GB LPDDR4 chips (8GB total) @ 4266MHz for ARM system (64 bits)
- 432 MB of ultra-low-latency GSI SRAMs
- 12x 18-bit chips
- 216-bit total bus width
Host interface
- 2x PCIe x8 Gen5 interfaces direct to FPGA, connected to PCIe Hard IP
I/O Expansion
- I/O expansion site connected to FPGA via 48x SerDes channels:
- VP1502: 12 GTYP and 36 GTM
- VP1552 : 32 GTYP and 16 GTM
- Default I/O module features:
- 2x QSFP-DD cages on front panel supporting 56G PAM4,
- QSFP28 cage on front panel supporting 28G NRZ,
ARC6-16
- 2x ARC6-16 connectors connected to FPGA via 8x SerDes channels each (16x total)
- VP1502: 16x GTM 56Gbps channels
- VP1552: 16x GTYP 32Gbps channels
Clocking
- 2x Jitter cleaners for network recovered clocking
USB
- USB access to BMC, USB-JTAG, USB-UART
Board Management Controller
- Onboard CLI
- Python, C++ API
- 200 Mbps parallel port connected to the FPGA fabric and the NOC
- USB SD Card Reader for simple OS images transfer to ARM processors
- Fast FPGA Boot Flash programming
- Temperature, voltage, current monitoring:
- SNMP agent for centralized management
- Dedicated preprogrammed array of 32 MAC addresses
- I/O ports monitoring. Full QSFP, SFP, QSFP-DD access and programming through CLI and API
- CLI-based clock selection supporting custom clock configurations
Cooling
- Standard: dual-width passive heatsink
Electrical
- On-board power derived from 12V PCIe slot and 2x AUX connectors
- Power dissipation is application dependent
Environmental
- Operating temperature: 5°C to 35°C
Form factor
- Standard-height, 3/4-length, dual-width PCIe card
- 10 x 4.37 inches (254 x 111.15 mm)
Development Tools
Application development
- Supported design flows -Vivado Design Suite (HDL, Verilog, VHDL, etc.)
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Product Data