EDT Bridge, Backpanel, and Time Boards attach to EDT main boards.
The EDT ATA Bridge is an auxiliary board that connects two EDT main boards (PCI SS, PCI GS, or PCIe8 LX) of the same type and in adjacent slots via ATA connectors. Two full-duplex Rocket I/O channels save on host computer resources.
The EDT Fan board is a mezzanine board that provides a cooling fan, backpanel, and mechanical support for all EDT accelerator boards, such as PCIe8 LX, PCI GS, and PCI SS.
The Time Distribution auxiliary board inputs a time code signal from a 1 pps or IRIG-B time code source and distributes it to multiple main boards as a timestamp. Control of the signal source is via one header main board back to the Time Distribution board. 12 main boards and their attached mezzanine boards can be served by a single time board.
Please use our FPGA Board Selector to find your preferred model.
Zerif Technologies Ltd.
Winnington House, 2 Woodberry Grove
Finchley, London N12 0DR
United Kingdom
+44 115 855 7883
info@zerif.co.uk