The EDT SSE is a mezzanine board that pairs with a PCI Express main board for high-speed data transfer. It offers two input and one output channel ECL. The SSE samples the data on the rising edge and stores it in host memory via the main board. Two wires in each channel support one differential data signal and two more wires support the differential clock. Termination is 50 Ohm to -2 Volts. Thirty-two additional LVDS, ECL, or RS-422 signals in groups of four can be supported, and another signal for notification of the start or end of a block transfer. Included are Windows and Linux SDK and device drivers.
Zerif Technologies Ltd. • H5 Ash Tree Court • Nottingham Business Park • NG8 6PY Nottingham • ENGLAND • +44 115 855 7883 • firstname.lastname@example.org