The EDT SRXL mezzanine board pairs with EDT PCI/e main boards and receives simultaneous L-band signals between 925 and 2175 MHz and IF between 65 and 225 MHz. Each input is processed with a tunable quadrature down-converter. The resulting baseband I and Q signals are low-pass filtered and digitized with 12-bit precision at programmable sample rates up to 65 MHz. The resulting four channels of digital sample data are available as inputs to the Xilinx Spartan 3 FPGA for signal processing or as a configurable switch matrix to route data to the main board and up to two 4-channel digital down-converter Graychips (GC4016).
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