BittWare's S5PE-DS is a PCIe x16 card featuring two high-bandwidth, power-efficient Altera Stratix V GX or GS FPGAs. Designed for high-end applications, the Stratix V provides a high level of system integration and flexibility for I/O, routing, and processing. The S5PE-DS provides up to 64 GBytes of DDR3 SDRAM as well as options for RLDRAM3 and QDRII+. Providing additional flexibility are four front-panel QSFP cages, allowing 4 40GigE interfaces, 16 10GigE, or 4 QDR/FDR InfiniBand interfaces direct to the FPGA's built in PHYs for the lowest possible latency. With almost 2 million logic elements available (952,000 per FPGA), the board is ideal for high-performance computing, and with the reduced latency provided by the network interfaces, ideal for high frequency trading, military/government agency secure communications, and network processing applications.
The Altera Stratix V FPGA is optimized for high-performance, high-bandwidth applications with integrated transceivers (up to 14.1 Gbps) supporting backplanes and optical modules. It supports 1.6 Tbps of serial switching capability and up to 3,926 18 x 18 variable precision multipliers. The Stratix V also provides PCI Express x8 via a hard IP block and supports configuration by PCI Express using the existing PCI Express link in your application. For additional flexibility, the Stratix V supports transceiver and core reconfiguration on-the-fly while other portions of the design are running. The two FPGAs are interconnected via 8 SerDes transceivers and 36 single-ended signals. The FPGAs are supported by BittWare’s FPGA Development Kit, which provides FPGA board support IP and integration.
TThe S5PE-DS provides a variety of interfaces for high-speed serial I/O as well as debug support. Four QSFP+ cages are available on the front panel, each supporting 40GigE, 4 10GigE channels, or QDR/FDR InfiniBand. The QSFP+ SerDes channels are connected directly to the Stratix V FPGAs, thus removing the latency of external PHYs. Eight SATA connectors are provided to connect external storage devices with the FPGAs via SerDes lanes. The Gen3 x16 PCIe interface is supported by a PCIe switch (PLX PEX8733), which provides on-chip DMA engines as well as a Gen3 x8 connection to each FPGA. USB 2.0, RS-232, and JTAG interfaces are available for debug and programming support. The board also supports timestamping with provision for a 1 PPS and reference clock input as well as RS-232 for connection to GPS or other time sources.
The S5PE-DS features an extremely flexible memory configuration, with 8 SODIMM sites (4 per FPGA) supporting DDR3 SDRAM, RLDRAM3, and QDRII+*. SODIMMs are available in the following configurations: up to 8 GBytes DDR3 with optional error-correcting codes (ECC); up to 36 MBytes QDRII+ (2 banks x18); or up to 512 MBytes RLDRAM3 (2 banks x18). The board also provides Flash memory for storing multiple FPGA images.
This boards's advanced system monitoring subsystem features a Board Management Controller (BMC), which accepts Intelligent Platform Management Interface (IPMI) messaging protocol commands.
The BMC features include control of power and resets, monitoring of board sensors, FPGA boot loader, voltage overrides, configuration of programmable clocks, access to I2C bus components, field upgrades, and IPMI messaging.
Access to the BMC is via PCIe or USB. BittWare’s BittWorks II Toolkit also provides utilities and libraries for communicating with the BMC components at a higher, more abstract level, allowing developers to remotely monitor the state of the board.
BittWare offers complete software support for this card with its BittWorks II software tools. The BittWorks II Toolkit serves as the main interface between the BittWare board and the host system. The Toolkit includes drivers, libraries, utilities, and example projects for accessing, integrating, and developing applications for the BittWare board.
BittWare's FPGA DevKit provides FPGA board support IP and integration for BittWare’s Altera FPGA-based boards. The FDK includes FPGA components that provide preconfigured physical interfaces, infrastructure, and examples, drastically cutting development time and easily integrating into existing FPGA development environments.
Working example projects are available for each board which illustrate how to move data between the board’s different interfaces. Supported interfaces include DDR4, DDR3, DDR2, QDR2/+, PCIe, 10GbE, LVDS, SerDes, and Double Data Rate I/O. All example projects are available on BittWare’s Developer Site.
BittWare offers firmware for the Stratix V FPGA on the S5 family PCIe boards, targeted specifically for high frequency trading applications. BittWare’s FPGA Development Kit provides a solid base for your financial application, including the following: